Last updated: Aug/11/2025 @ Home · sophgo/linux Wiki · GitHub
v6.17-rc1 is released. Update the status along together.
About the content merged into this version, see [1] & [2]:
Link: Making sure you're not a bot! [1]
Link: Making sure you're not a bot! [2]
摘录如下：
RISC-V Devicetrees for v6.17
Sophgo:
For CV18xx serials:
There are three major changes. The first is to add the
RTCSYS MFD node, which provides rich control registers
for soc power management and other rich control functions;
the second is to add the reset controller node and add
related reset properties for other peripherals; the third
is to add ethernet controller related nodes to the soc
and enable ethernet device control for HuashanPi.
For SG2042:
There are three major changes. The first is to add ISA
extensions such as xtheadvector/ziccrse/zfh for cpu cores;
the second is add ethernet controller support; the third
is add two new boards EVB_V1 & EVB_V2 which use SG2042
SoC.
For SG2044:
There are many changes. The first is to add pmu
configuration; the second is to add ISA extensions
ziccrse and add missing riscv,cbop-block-size property
for cpu cores; the third is to add more peripherals
nodes for SoC after clock controller is ready, such as
MSI/PCIe/pwm/SPI-NOR etc. This PR also add HWMON MCU
device for the sophgo-srd3-10 board and reserve uart0
node for sophgo-srd3-10 board because uart0 is already
occupied by the firmware.
This PR also moves sophgo.yaml from the riscv directory
to soc/sophgo for sharing between riscv and arm. CV18xx
SoC contains a RISC-V big core and an ARM64 big core.
Moving sophgo.yaml to a shared location will help us
add support for ARM cores to the CV18xx chip in the future.
ARM Devicetrees for v6.17
Sophgo:
Add support for Duo Module 01 Evaluation Board.
This board uses SG2000(old codename CV181xH),
which is dual-arch, RISC-V and ARM64. This
patch add the support for ARM64.
欢迎订阅 “Linux Sophgo SoC development” 邮件列表获取 Sophgo Linux 内核上游化信息最新消息。订阅方法: 搜索 “sophgo” @lists.linux.dev — subspace.kernel.org documentation
